The present disclosure relates generally to electronic displays and, more particularly, to providing an indication of the start of active frame data prior to displaying the active frame on the display.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present techniques, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Electronic displays, such as liquid crystal displays (LCDs) and organic light emitting diode (OLED) displays, are commonly used in electronic devices such as televisions, computers, and phones. The electronic displays display images when image data is sent by a timing controller (TCON) to display drivers in the electronic display. Oftentimes, these displays may implement integrated row driver technology for an enhanced narrow bezel design. However, this integrated row driver technology oftentimes consumes large amounts of power due to high-voltage swing clocks used in this technology. Accordingly, to reduce power consumption, multiple clocks may be used to reduce the frequency of the clock signals over multiple clocks. A vertical start pulse is used in this multi-clock approach. The vertical start pulse is provided several lines earlier than the actual frame start, indicating a time when the actual frame start begins. In conventional systems, the vertical start pulse is placed subsequent to the active frame start by using one or more line buffers to delay the active frame data during a lead time expected by the display circuitry (e.g., a fixed amount of time between the vertical start pulse and the start of the active frame). Unfortunately, these line buffers may offer several inefficiencies. For example, the line buffers may occupy a significant amount of die area of display circuitry and may also consume excessive amounts of power.